The invention relates to a circuit arrangement for generating an output signal, having a plurality of predetermined values which change quickly from an input signal which varies substantially more slowly.
Circuit arrangements of this kind are generally known, for example from the book by Tietze/Schenk "Halbleiter-Schaltungstechnik", Springer-Verlag 1978, pp. 134 and 135 as well as pp. 412 to 415, and serve to generate particularly unambiguous binary signals, having two signal values, from an input signal with slow signal transitions, said binary signals being suitable for further processing in logic circuits. The value of the output signal of such a circuit changes when the input signal exceeds a high threshold value, and the output signal returns to its previous value when the input signal subsequently drops below a lower threshold value. It is thus ensured that the output signal will not be influenced by any small interference signals superposed on the input signal. This is achieved because when the input signal has exceeded the upper threshold value, only a negative interference signal which drops the input signal below the lower threshold value can cause a change of the output signal, and vice versa upon the trailing edge of the input signal.
It is a drawback of the known circuits that the evaluation of the signal can take place only comparatively late after the beginning of the positive-going or negative-going edge. When the input signals originate from a bus whereto several apparatus are connected, each apparatus being capable of initiating the transmission of a message (multi-master operation), in order to avoid conflicts on the bus each signal is sampled a predetermined period of time after the beginning of the leading edge of the signal and only the signal state upon sampling is evaluated. In the case of an extensive bus, the signal edges could be comparatively flat so that the duration of each signal may not be shorter than a given value. Consequently, the maximum frequency of the signals, and hence the transmission capacity of the bus, is limited. Moreover, in the known circuits the input signal must exceed the upper threshold value as well as drop below the lower threshold value. However, if the input signal is derived from the signal difference on two leads transmitting a signal in phase opposition and, for example one of these two leads constantly transmits a high or a low signal because of a fault, the input signal derived therefrom will change with a smaller swing only in the lower or the upper value range, so that in such a case it is difficult to obtain a useful output signal by means of the known circuit arrangements.